Messages in this thread | | | Date | Thu, 2 Nov 2017 14:46:59 +0100 (CET) | From | Thomas Gleixner <> | Subject | Re: [PATCH V3 1/5] perf/x86/intel/uncore: customized pmu event read for client IMC uncore |
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On Tue, 24 Oct 2017, kan.liang@intel.com wrote: > - if (event->hw.idx >= UNCORE_PMC_IDX_FIXED) > + if (event->hw.idx == UNCORE_PMC_IDX_FIXED) > shift = 64 - uncore_fixed_ctr_bits(box); > else > shift = 64 - uncore_perf_ctr_bits(box); > diff --git a/arch/x86/events/intel/uncore_snb.c b/arch/x86/events/intel/uncore_snb.c > index db1127c..9d5cd3f 100644 > --- a/arch/x86/events/intel/uncore_snb.c > +++ b/arch/x86/events/intel/uncore_snb.c > @@ -498,6 +498,30 @@ static void snb_uncore_imc_event_del(struct perf_event *event, int flags) > snb_uncore_imc_event_stop(event, PERF_EF_UPDATE); > } > > +static void snb_uncore_imc_event_read(struct perf_event *event) > +{ > + struct intel_uncore_box *box = uncore_event_to_box(event); > + u64 prev_count, new_count, delta; > + int shift; > + > + if (event->hw.idx >= UNCORE_PMC_IDX_FIXED)
And this needs to be >= because?
> + shift = 64 - uncore_fixed_ctr_bits(box); > + else > + shift = 64 - uncore_perf_ctr_bits(box);
Thanks,
tglx
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