Messages in this thread | | | Date | Tue, 14 Nov 2017 10:04:42 -0800 | From | Stephen Boyd <> | Subject | Re: [PATCH] clk: uniphier: fix DAPLL2 clock rate of Pro5 |
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On 10/05, Masahiro Yamada wrote: > The parent of DAPLL2 should be DAPLL1. Fix the clock connection. > > Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> > ---
Applied to clk-next
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