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    Subject[PATCH v9 16/29] x86/insn-eval: Add function to get default params of code segment
    Date
    Obtain the default values of the address and operand sizes as specified in
    the D and L bits of the the segment descriptor selected by the register
    CS. The function can be used for both protected and long modes.
    For virtual-8086 mode, the default address and operand sizes are always 2
    bytes.

    The returned parameters are encoded in a signed 8-bit data type. Auxiliar
    macros are provided to encode and decode such values.

    Cc: Dave Hansen <dave.hansen@linux.intel.com>
    Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
    Cc: Colin Ian King <colin.king@canonical.com>
    Cc: Lorenzo Stoakes <lstoakes@gmail.com>
    Cc: Qiaowei Ren <qiaowei.ren@intel.com>
    Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
    Cc: Masami Hiramatsu <mhiramat@kernel.org>
    Cc: Adrian Hunter <adrian.hunter@intel.com>
    Cc: Kees Cook <keescook@chromium.org>
    Cc: Thomas Garnier <thgarnie@google.com>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Borislav Petkov <bp@suse.de>
    Cc: Dmitry Vyukov <dvyukov@google.com>
    Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
    Cc: x86@kernel.org
    Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
    ---
    arch/x86/include/asm/insn-eval.h | 5 ++++
    arch/x86/lib/insn-eval.c | 64 ++++++++++++++++++++++++++++++++++++++++
    2 files changed, 69 insertions(+)

    diff --git a/arch/x86/include/asm/insn-eval.h b/arch/x86/include/asm/insn-eval.h
    index 25d6e44..a5886ecc 100644
    --- a/arch/x86/include/asm/insn-eval.h
    +++ b/arch/x86/include/asm/insn-eval.h
    @@ -11,8 +11,13 @@
    #include <linux/err.h>
    #include <asm/ptrace.h>

    +#define INSN_CODE_SEG_ADDR_SZ(params) ((params >> 4) & 0xf)
    +#define INSN_CODE_SEG_OPND_SZ(params) (params & 0xf)
    +#define INSN_CODE_SEG_PARAMS(oper_sz, addr_sz) (oper_sz | (addr_sz << 4))
    +
    void __user *insn_get_addr_ref(struct insn *insn, struct pt_regs *regs);
    int insn_get_modrm_rm_off(struct insn *insn, struct pt_regs *regs);
    unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx);
    +char insn_get_code_seg_defaults(struct pt_regs *regs);

    #endif /* _ASM_X86_INSN_EVAL_H */
    diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c
    index 02c4498..cb2734a 100644
    --- a/arch/x86/lib/insn-eval.c
    +++ b/arch/x86/lib/insn-eval.c
    @@ -624,6 +624,70 @@ static unsigned long get_seg_limit(struct pt_regs *regs, int seg_reg_idx)
    }

    /**
    + * insn_get_code_seg_defaults() - Obtain code segment default parameters
    + * @regs: Structure with register values as seen when entering kernel mode
    + *
    + * Obtain the default parameters of the code segment: address and operand sizes.
    + * The code segment is obtained from the selector contained in the CS register
    + * in regs. In protected mode, the default address is determined by inspecting
    + * the L and D bits of the segment descriptor. In virtual-8086 mode, the default
    + * is always two bytes for both address and operand sizes.
    + *
    + * Returns:
    + *
    + * A signed 8-bit value containing the default parameters on success.
    + *
    + * -EINVAL on error.
    + */
    +char insn_get_code_seg_defaults(struct pt_regs *regs)
    +{
    + struct desc_struct *desc;
    + short sel;
    +
    + if (v8086_mode(regs))
    + /* Address and operand size are both 16-bit. */
    + return INSN_CODE_SEG_PARAMS(2, 2);
    +
    + sel = get_segment_selector(regs, INAT_SEG_REG_CS);
    + if (sel < 0)
    + return -1L;
    +
    + desc = get_desc(sel);
    + if (!desc)
    + return -EINVAL;
    +
    + /*
    + * The most significant byte of the Type field of the segment descriptor
    + * determines whether a segment contains data or code. If this is a data
    + * segment, return error.
    + */
    + if (!(desc->type & BIT(3)))
    + return -EINVAL;
    +
    + switch ((desc->l << 1) | desc->d) {
    + case 0: /*
    + * Legacy mode. CS.L=0, CS.D=0. Address and operand size are
    + * both 16-bit.
    + */
    + return INSN_CODE_SEG_PARAMS(2, 2);
    + case 1: /*
    + * Legacy mode. CS.L=0, CS.D=1. Address and operand size are
    + * both 32-bit.
    + */
    + return INSN_CODE_SEG_PARAMS(4, 4);
    + case 2: /*
    + * IA-32e 64-bit mode. CS.L=1, CS.D=0. Address size is 64-bit;
    + * operand size is 32-bit.
    + */
    + return INSN_CODE_SEG_PARAMS(4, 8);
    + case 3: /* Invalid setting. CS.L=1, CS.D=1 */
    + /* fall through */
    + default:
    + return -EINVAL;
    + }
    +}
    +
    +/**
    * insn_get_modrm_rm_off() - Obtain register in r/m part of the ModRM byte
    * @insn: Instruction containing the ModRM byte
    * @regs: Register values as seen when entering kernel mode
    --
    2.7.4
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