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SubjectRe: [PATCH 06/12] nvmem: sunxi-sid: add support for A64/H5's SID controller
On Mon, Oct 09, 2017 at 03:26:35PM +0200, srinivas.kandagatla@linaro.org wrote:
> From: Icenowy Zheng <icenowy@aosc.io>
>
> Allwinner A64/H5 SoCs come with a SID controller like the one in H3, but
> without the silicon bug that makes the initial value at 0x200 wrong, so
> the value at 0x200 can be directly read.
>
> Add support for this kind of SID controller.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 +
> drivers/nvmem/sunxi_sid.c | 6 ++++++
> 2 files changed, 7 insertions(+)

I need a DT maintainer's ack for this, right?

thanks,

greg k-h

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