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SubjectRe: [PATCH v12 10/13] arch/x86: enable task isolation functionality
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On 5/18/2016 12:23 PM, Peter Zijlstra wrote:
> On Tue, Apr 05, 2016 at 01:38:39PM -0400, Chris Metcalf wrote:
>> diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
>> index 06cbe25861f1..b02205085571 100644
>> --- a/arch/x86/kernel/traps.c
>> +++ b/arch/x86/kernel/traps.c
>> @@ -36,6 +36,7 @@
>> #include <linux/mm.h>
>> #include <linux/smp.h>
>> #include <linux/io.h>
>> +#include <linux/isolation.h>
>>
>> #ifdef CONFIG_EISA
>> #include <linux/ioport.h>
>> @@ -382,6 +383,7 @@ dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
>> case 2: /* Bound directory has invalid entry. */
>> if (mpx_handle_bd_fault())
>> goto exit_trap;
>> + task_isolation_exception("bounds check");
>> break; /* Success, it was handled */
>> case 1: /* Bound violation. */
>> info = mpx_generate_siginfo(regs);
>> diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
>> index 5ce1ed02f7e8..025e9d2850c1 100644
>> --- a/arch/x86/mm/fault.c
>> +++ b/arch/x86/mm/fault.c
>> @@ -14,6 +14,7 @@
>> #include <linux/prefetch.h> /* prefetchw */
>> #include <linux/context_tracking.h> /* exception_enter(), ... */
>> #include <linux/uaccess.h> /* faulthandler_disabled() */
>> +#include <linux/isolation.h> /* task_isolation_exception */
>>
>> #include <asm/cpufeature.h> /* boot_cpu_has, ... */
>> #include <asm/traps.h> /* dotraplinkage, ... */
>> @@ -1259,6 +1260,7 @@ __do_page_fault(struct pt_regs *regs, unsigned long error_code,
>> local_irq_enable();
>> error_code |= PF_USER;
>> flags |= FAULT_FLAG_USER;
>> + task_isolation_exception("page fault at %#lx", address);
>> } else {
>> if (regs->flags & X86_EFLAGS_IF)
>> local_irq_enable();
>
> That seems to miss a whole bunch of exceptions... what up?

We only need to do an explicit call in the case where the exception does NOT
result in a signal, since a signal is something that will be really obvious to
the application in any case. So it's just stuff like handled page faults,
handled bounds checks for x86, handled unaligned load/store for tilegx, etc.

--
Chris Metcalf, Mellanox Technologies
http://www.mellanox.com

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