lkml.org 
[lkml]   [2016]   [Mar]   [7]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 3.14 08/36] drm/ast: Fix incorrect register check for DRAM width
    Date
    3.14-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Timothy Pearson <tpearson@raptorengineeringinc.com>

    commit 2d02b8bdba322b527c5f5168ce1ca10c2d982a78 upstream.

    During DRAM initialization on certain ASpeed devices, an incorrect
    bit (bit 10) was checked in the "SDRAM Bus Width Status" register
    to determine DRAM width.

    Query bit 6 instead in accordance with the Aspeed AST2050 datasheet v1.05.

    Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
    Signed-off-by: Dave Airlie <airlied@redhat.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/gpu/drm/ast/ast_main.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    --- a/drivers/gpu/drm/ast/ast_main.c
    +++ b/drivers/gpu/drm/ast/ast_main.c
    @@ -124,7 +124,7 @@ static int ast_get_dram_info(struct drm_
    } while (ast_read32(ast, 0x10000) != 0x01);
    data = ast_read32(ast, 0x10004);

    - if (data & 0x400)
    + if (data & 0x40)
    ast->dram_bus_width = 16;
    else
    ast->dram_bus_width = 32;

    \
     
     \ /
      Last update: 2016-03-08 01:41    [W:3.498 / U:1.420 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site