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    Subject[PATCH 3.16.y-ckt 040/180] powerpc: Make value-returning atomics fully ordered
    Date
    3.16.7-ckt24 -stable review patch.  If anyone has any objections, please let me know.

    ---8<------------------------------------------------------------

    From: Boqun Feng <boqun.feng@gmail.com>

    commit 49e9cf3f0c04bf76ffa59242254110309554861d upstream.

    According to memory-barriers.txt:

    > Any atomic operation that modifies some state in memory and returns
    > information about the state (old or new) implies an SMP-conditional
    > general memory barrier (smp_mb()) on each side of the actual
    > operation ...

    Which mean these operations should be fully ordered. However on PPC,
    PPC_ATOMIC_ENTRY_BARRIER is the barrier before the actual operation,
    which is currently "lwsync" if SMP=y. The leading "lwsync" can not
    guarantee fully ordered atomics, according to Paul Mckenney:

    https://lkml.org/lkml/2015/10/14/970

    To fix this, we define PPC_ATOMIC_ENTRY_BARRIER as "sync" to guarantee
    the fully-ordered semantics.

    This also makes futex atomics fully ordered, which can avoid possible
    memory ordering problems if userspace code relies on futex system call
    for fully ordered semantics.

    Fixes: b97021f85517 ("powerpc: Fix atomic_xxx_return barrier semantics")
    Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
    Reviewed-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
    Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
    Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
    Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
    ---
    arch/powerpc/include/asm/synch.h | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h
    index e682a7143edb..c50868681f9e 100644
    --- a/arch/powerpc/include/asm/synch.h
    +++ b/arch/powerpc/include/asm/synch.h
    @@ -44,7 +44,7 @@ static inline void isync(void)
    MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup);
    #define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER)
    #define PPC_RELEASE_BARRIER stringify_in_c(LWSYNC) "\n"
    -#define PPC_ATOMIC_ENTRY_BARRIER "\n" stringify_in_c(LWSYNC) "\n"
    +#define PPC_ATOMIC_ENTRY_BARRIER "\n" stringify_in_c(sync) "\n"
    #define PPC_ATOMIC_EXIT_BARRIER "\n" stringify_in_c(sync) "\n"
    #else
    #define PPC_ACQUIRE_BARRIER
    \
     
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