Messages in this thread | | | Date | Wed, 10 Feb 2016 11:27:50 -0800 | From | "Luck, Tony" <> | Subject | Re: [PATCH v10 4/4] x86: Create a new synthetic cpu capability for machine check recovery |
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On Wed, Feb 10, 2016 at 12:06:03PM +0100, Borislav Petkov wrote: > What about MSR_IA32_PLATFORM_ID or some other MSR or register, for > example?
Bits 52:50 give us "information concerning the intended platform for the processor" ... but we don't seem to decode that vague statement into anything that I can make use of.
> I.e., isn't there some other, more reliable distinction between E5 and > E7 besides the model ID?
Digging in the data sheet I found the CAPID0 register which does indicate in bit 4 whether this is an "EX" (a.k.a. "E7" part). But we invent a new PCI device ID for this every generation (0x0EC3 in Ivy Bridge, 0x2fc0 in Haswell, 0x6fc0 in Broadwell). The offset has stayed at 0x84 through all this.
I don't think that hunting the ever-changing PCI-id is a good choice ... the "E5/E7" naming convention has stuck for four generations[1] (Sandy Bridge, Ivy Bridge, Haswell, Broadwell).
-Tony
[1] Although this probably means that marketing are about to think of something new ... they generally do when people start understanding the model names :-(
-Tony
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