Messages in this thread | | | From | Arnd Bergmann <> | Subject | Re: [PATCH 1/8] clk: add device tree binding for artpec-6 pll1 clock | Date | Wed, 10 Feb 2016 15:36:03 +0100 |
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On Wednesday 10 February 2016 13:41:50 Lars Persson wrote: > Signed-off-by: Lars Persson <larper@axis.com> > ---
Always write a changelog comment.
> +* Clock bindings for Axis ARTPEC-6 chip > + > +Required properties: > +- compatible: Should be "axis,artpec6-pll1-clock" > +- #clock-cells: Should be <1>
What is the clock cell used for?
> +Examples: > + > +pll1_clk: pll1_clk { > + #clock-cells = <1>; > + compatible = "axis,artpec6-pll1-clock"; > + clocks = <&ext_clk>; > + status = "okay"; > +}; >
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