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SubjectRe: [PATCH v2] ARM: Drop fixed 200 Hz timer requirement from Samsung platforms
On Mon, Nov 21, 2016 at 03:01:57PM +0900, Tomasz Figa wrote:
> One thing to correct here is that the typical clock is PCLK, which is
> derived from one of the PLLs and AFAIR is between 33-66 MHz on
> s3c24xx. Technically you can drive the PWM block from an external
> clock (12 MHz for some board-file based boards), but for simplicity
> this functionality was omitted in the new PWM timer driver used for DT
> boards (which worked fine with the PWM driven by PCLK).

So that's a knowingly-made regression for s3c24xx then. Pretty
disgusting developer behavior to do that, IMHO.

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