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    Subject[PATCH v2 0/4] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing
    Date
    These patches enable Intel Xeon Phi x200 feature to use MONITOR/MWAIT
    instruction in ring 3 (userspace) Patches set MSR 0x140 for all logical CPUs.
    Then expose it as CPU feature and introduces elf HWCAP capability for x86.
    Reference:
    https://software.intel.com/en-us/blogs/2016/10/06/intel-xeon-phi-product-family-x200-knl-user-mode-ring-3-monitor-and-mwait

    v2:
    Check MSR before wrmsrl
    Shortened names
    Used Word 3 for feature init_scattered_cpuid_features()
    Fixed commit messages

    Grzegorz Andrejczuk (4):
    Add R3MWAIT register and bit to msr-info.h
    Add enabling of the R3 MWAIT during boot for KNL
    Add hwcap2 for x86
    Add R3MWAIT to CPU features

    arch/x86/include/asm/cpufeatures.h | 2 ++
    arch/x86/include/asm/elf.h | 7 +++++++
    arch/x86/include/asm/msr-index.h | 5 +++++
    arch/x86/include/uapi/asm/hwcap.h | 7 +++++++
    arch/x86/kernel/cpu/common.c | 6 ++++++
    arch/x86/kernel/cpu/intel.c | 27 +++++++++++++++++++++++++++
    arch/x86/kernel/cpu/scattered.c | 5 +++++
    7 files changed, 59 insertions(+)
    create mode 100644 arch/x86/include/uapi/asm/hwcap.h

    --
    2.5.1

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