| From | Alexander Shishkin <> | Subject | Re: [RFC PATCH 18/20] coresight: etm3x: pushing down perf configuration to tracer | Date | Wed, 30 Sep 2015 15:45:20 +0300 |
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Mathieu Poirier <mathieu.poirier@linaro.org> writes:
> +#define ETM3X_SUPPORTED_OPTIONS (ETMCR_CYC_ACC | ETMCR_TIMESTAMP_EN) > + > +static int etm_parse_event_config(struct etm_drvdata *drvdata, > + struct perf_event *event) > +{ > + u64 config = event->attr.config; > + > + /* > + * At this time only cycle accurate and timestamp options are > + * available. As such clear everything else that may have been > + * configured and set the ETM control register based on what was > + * requested. > + */ > + config &= ETM3X_SUPPORTED_OPTIONS;
You want to make sure no bits outside of this mask are set in config, though, and return -EINVAL. Below you're even checking for it:
> + if (etm_parse_event_config(drvdata, event)) > + return -EINVAL;
Regards, -- Alex
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