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    Subject[PATCH v5 1/2] dt-bindings: Add Cygnus PCIe PHY binding doc
    Date
    Add DT binding document for Broadcom Cygnus PCIe PHYs

    Signed-off-by: Ray Jui <rjui@broadcom.com>
    Reviewed-by: Arun Parameswaran <aparames@broadcom.com>
    Reviewed-by: JD (Jiandong) Zheng <jdzheng@broadcom.com>
    Reviewed-by: Scott Branden <sbranden@broadcom.com>
    ---
    .../bindings/phy/brcm,cygnus-pcie-phy.txt | 47 ++++++++++++++++++++++
    1 file changed, 47 insertions(+)
    create mode 100644 Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt

    diff --git a/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt
    new file mode 100644
    index 0000000..761c4bc
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt
    @@ -0,0 +1,47 @@
    +Broadcom Cygnus PCIe PHY
    +
    +Required properties:
    +- compatible: must be "brcm,cygnus-pcie-phy"
    +- reg: base address and length of the PCIe PHY block
    +- #address-cells: must be 1
    +- #size-cells: must be 0
    +
    +Each PCIe PHY should be represented by a child node
    +
    +Required properties For the child node:
    +- reg: the PHY ID
    +0 - PCIe RC 0
    +1 - PCIe RC 1
    +- #phy-cells: must be 0
    +
    +Example:
    + pcie_phy: phy@0301d0a0 {
    + compatible = "brcm,cygnus-pcie-phy";
    + reg = <0x0301d0a0 0x14>;
    +
    + pcie0_phy: phy@0 {
    + reg = <0>;
    + #phy-cells = <0>;
    + };
    +
    + pcie1_phy: phy@1 {
    + reg = <1>;
    + #phy-cells = <0>;
    + };
    + };
    +
    + /* users of the PCIe phy */
    +
    + pcie0: pcie@18012000 {
    + ...
    + ...
    + phys = <&pcie0_phy>;
    + phy-names = "pcie-phy";
    + };
    +
    + pcie1: pcie@18013000 {
    + ...
    + ...
    + phys = <pcie1_phy>;
    + phy-names = "pcie-phy";
    + };
    --
    1.9.1


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