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    Subject[PATCH 4.2 040/120] clk: pistachio: correct critical clock list
    Date
    4.2-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: "Damien.Horsley" <Damien.Horsley@imgtec.com>

    commit d31ff5f7f3b142b8d1ebb3da89187c54cdf2bc71 upstream.

    Current critical clock list for pistachio enables
    only mips and sys clocks by default but there are
    also other clocks that are not claimed by anyone and
    needs to be enabled by default.

    This patch updates the critical clocks that need
    to be enabled by default.

    Add a separate struct to distinguish the critical clocks
    as listed:
    1.) core clocks:
    a.) mips clock
    2.) peripheral system clocks:
    a.) sys clock
    b.) sys_bus clock
    c.) DDR clock
    d.) ROM clock

    Fixes: b35d7c33419c("CLK: Pistachio: Register core clocks")
    Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
    Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
    Signed-off-by: Damien.Horsley <Damien.Horsley@imgtec.com>
    Signed-off-by: Govindraj Raja <govindraj.raja@imgtec.com>
    Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/clk/pistachio/clk-pistachio.c | 19 ++++++++++++++-----
    1 file changed, 14 insertions(+), 5 deletions(-)

    --- a/drivers/clk/pistachio/clk-pistachio.c
    +++ b/drivers/clk/pistachio/clk-pistachio.c
    @@ -159,9 +159,15 @@ PNAME(mux_debug) = { "mips_pll_mux", "rp
    "wifi_pll_mux", "bt_pll_mux" };
    static u32 mux_debug_idx[] = { 0x0, 0x1, 0x2, 0x4, 0x8, 0x10 };

    -static unsigned int pistachio_critical_clks[] __initdata = {
    - CLK_MIPS,
    - CLK_PERIPH_SYS,
    +static unsigned int pistachio_critical_clks_core[] __initdata = {
    + CLK_MIPS
    +};
    +
    +static unsigned int pistachio_critical_clks_sys[] __initdata = {
    + PERIPH_CLK_SYS,
    + PERIPH_CLK_SYS_BUS,
    + PERIPH_CLK_DDR,
    + PERIPH_CLK_ROM,
    };

    static void __init pistachio_clk_init(struct device_node *np)
    @@ -193,8 +199,8 @@ static void __init pistachio_clk_init(st

    pistachio_clk_register_provider(p);

    - pistachio_clk_force_enable(p, pistachio_critical_clks,
    - ARRAY_SIZE(pistachio_critical_clks));
    + pistachio_clk_force_enable(p, pistachio_critical_clks_core,
    + ARRAY_SIZE(pistachio_critical_clks_core));
    }
    CLK_OF_DECLARE(pistachio_clk, "img,pistachio-clk", pistachio_clk_init);

    @@ -261,6 +267,9 @@ static void __init pistachio_clk_periph_
    ARRAY_SIZE(pistachio_periph_gates));

    pistachio_clk_register_provider(p);
    +
    + pistachio_clk_force_enable(p, pistachio_critical_clks_sys,
    + ARRAY_SIZE(pistachio_critical_clks_sys));
    }
    CLK_OF_DECLARE(pistachio_clk_periph, "img,pistachio-clk-periph",
    pistachio_clk_periph_init);



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