Messages in this thread | | | From | Heiko Stuebner <> | Subject | Re: [PATCH v4 10/16] phy: Add driver for rockchip Display Port PHY | Date | Tue, 01 Sep 2015 22:58:59 +0200 |
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Hi Yakir,
small nit more below
Am Dienstag, 1. September 2015, 18:51:16 schrieb Heiko Stuebner: > Am Dienstag, 1. September 2015, 14:04:15 schrieb Yakir Yang: > > +- clocks: from common clock binding: handle to dp clock. > > + of memory mapped region. > > +- clock-names: from common clock binding: > > + Required elements: "sclk_dp" "sclk_dp_24m" > > + > > +- rockchip,grf: this soc should set GRF regs, so need get grf here. > > +- #phy-cells : from the generic PHY bindings, must be 0; > > + > > +Example: > > + > > +edp_phy: phy@ff770274 { > > edp_phy: edp-phy { > > > + compatilble = "rockchip,rk3288-dp-phy";
typo: compatible
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