Messages in this thread | | | Subject | Re: [PATCH] sha: Enable cpuid check for Intel SHA extensions implementations | From | Tim Chen <> | Date | Wed, 19 Aug 2015 09:49:58 -0700 |
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On Tue, 2015-08-18 at 18:46 +0200, Thomas Gleixner wrote: > On Mon, 17 Aug 2015, Tim Chen wrote: > > Signed-off-by: Chandramouli Narayanan <mouli@linux.intel.com> > > Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com> > > And now the question who authored this complex one liner .... >
Mouli did the patch originally but he left the company. So I'm picking it up.
Tim
> > --- > > arch/x86/include/asm/cpufeature.h | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h > > index 3d6606f..a94f83d 100644 > > --- a/arch/x86/include/asm/cpufeature.h > > +++ b/arch/x86/include/asm/cpufeature.h > > @@ -239,6 +239,7 @@ > > #define X86_FEATURE_AVX512PF ( 9*32+26) /* AVX-512 Prefetch */ > > #define X86_FEATURE_AVX512ER ( 9*32+27) /* AVX-512 Exponential and Reciprocal */ > > #define X86_FEATURE_AVX512CD ( 9*32+28) /* AVX-512 Conflict Detection */ > > +#define X86_FEATURE_SHA_NI ( 9*32+29) /* SHA1/SHA256 Instruction Extensions */ > > > > /* Extended state features, CPUID level 0x0000000d:1 (eax), word 10 */ > > #define X86_FEATURE_XSAVEOPT (10*32+ 0) /* XSAVEOPT */ > > -- > > 1.8.3.1 > > > > > > > >
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