Messages in this thread | | | Date | Mon, 6 Jul 2015 21:04:11 +0800 | From | Jisheng Zhang <> | Subject | Re: [patch] irqchip/dw-apb-ictl: Fix generic domain chip wreckage |
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On Mon, 6 Jul 2015 14:55:43 +0200 Thomas Gleixner <tglx@linutronix.de> wrote:
> On Mon, 6 Jul 2015, Thomas Gleixner wrote: > > On Mon, 6 Jul 2015, Jisheng Zhang wrote: > > > > Thomas Gleixner <tglx@linutronix.de> wrote: > > > the following patch seems fix the panic, but I dunno whether it's correct or not, > > > could you please help to check? > > > > > > Thanks, > > > Jisheng > > > > > > diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c > > > index f4a0e11..8d996cb 100644 > > > --- a/drivers/irqchip/irq-dw-apb-ictl.c > > > +++ b/drivers/irqchip/irq-dw-apb-ictl.c > > > @@ -30,13 +30,14 @@ > > > static void dw_apb_ictl_handler(unsigned int irq, struct irq_desc *desc) > > > { > > > struct irq_domain *d = irq_desc_get_handler_data(desc); > > > - struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, 0); > > > + struct irq_chip_generic *gc; > > > struct irq_chip *chip = irq_desc_get_chip(desc); > > > int n; > > > > > > chained_irq_enter(chip, desc); > > > > > > - for (n = 0; n < d->gc->num_chips; n++, gc++) { > > > + for (n = 0; n < d->gc->num_chips; n++) { > > > + gc = irq_get_domain_generic_chip(d, n * 32); > > > u32 stat = readl_relaxed(gc->reg_base + APB_INT_FINALSTATUS_L); > > > > Yes it's correct. Seems I tried to be overly clever by avoiding the > > lookup of the second chip. Will fold back. > > Hmm. That does not make sense because the real issue is here: > > - for (i = 0; i < nrirqs / 32; i++) { > + for (i = 0; i < DIV_ROUND_UP(nrirqs, 32); i++) { >
OOPS, we need the above DIV_ROUND_UP fix. But...
On Berlin SoC, nrirqs = 64, so it doesn't make difference and we get the same panic.
Thanks, Jisheng
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