lkml.org 
[lkml]   [2015]   [Jul]   [22]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH] x86: adjust default caching mode translation tables
From
Date
On Wed, 2015-07-22 at 09:17 -0600, Jan Beulich wrote:
> >
> > > > On 22.07.15 at 00:29, <toshi.kani@hp.com> wrote:
> > On Mon, 2015-07-20 at 08:46 +0100, Jan Beulich wrote:
> > > Make WT really mean WT (rather than UC).
> > >
> > > I can't see why commit 9cd25aac1f ("x86/mm/pat: Emulate PAT when it
> > > is
> > > disabled") didn't make this match its changes to pat_init().
> >
> > No, the default values need to be set to the fallback types, i.e.
> > minimal
> > supported mode. For WC and WT, UC is the fallback type.
>
> But why would that be?
>
> > When PAT is disabled, pat_init() does update the tables below to enable
> > WT
> > per the default BIOS setup. However, when PAT is enabled, but CPU has
> > PAT
> > -errata, WT falls back to UC per the default values.
>
> PAT related errata I'm aware of are related to either page size or
> the number of bits used to index into the PAT MSR, but never to
> a particular memory type. Are you saying there are errata which
> make use of WT or WC impossible altogether? Otherwise I would
> have thought (even more so in the absence of any comment
> saying otherwise - "minimal supported modes" doesn't really say
> on what basis the set is the minimal one) that the mode systems
> come up in (compatible with pre-PAT) ought to be what the tables
> express.

Please take a look at the comments in pat_init(). WT uses slot 7 (not slot
1) in the regular case. We need to use the PAT bit in order to support
both WC and WT. The PAT errata causes the PAT bit ineffective.

Thanks,
-Toshi


\
 
 \ /
  Last update: 2015-07-22 17:41    [W:0.059 / U:2.036 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site