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    SubjectRe: [PATCH v4 3/6] clk: fractional-divider: keep mwidth and nwidth internally
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    On Tue, 2015-07-21 at 17:41 -0700, Stephen Boyd wrote:
    > On 07/14, Andy Shevchenko wrote:
    > > diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk
    > > -fractional-divider.c
    > > index 7cfcc56..16f42ae 100644
    > > --- a/drivers/clk/clk-fractional-divider.c
    > > +++ b/drivers/clk/clk-fractional-divider.c
    > > @@ -128,9 +128,11 @@ struct clk
    > > *clk_register_fractional_divider(struct device *dev,
    > >
    > > fd->reg = reg;
    > > fd->mshift = mshift;
    > > - fd->mmask = (BIT(mwidth) - 1) << mshift;
    > > + fd->mwidth = mwidth;
    > > + fd->mmask = GENMASK(mwidth - 1, 0) << mshift;
    > > fd->nshift = nshift;
    > > - fd->nmask = (BIT(nwidth) - 1) << nshift;
    > > + fd->nwidth = nwidth;
    > > + fd->nmask = GENMASK(nwidth - 1, 0) << nshift;
    >
    > Please do the shifts in the GENMASK.

    It's not optimal. Waste of performance.

    32-bit case on 32-bit machine (similar to other cases on x86).

    a) GENMASK(x - 1, 0) << y

    movl $32, %ecx
    subb 4(%esp), %cl
    movl $-1, %eax
    shrl %cl, %eax
    movzbl 8(%esp), %ecx
    sall %cl, %eax
    ret

    b) GENMASK(x + y - 1, y)

    pushl %esi
    pushl %ebx
    movl $1, %edx
    movzbl 12(%esp), %eax
    movzbl 16(%esp), %esi
    movl $-1, %ebx
    subl %eax, %edx
    movl %ebx, %eax
    subl %esi, %edx
    leal 31(%edx), %ecx
    shrl %cl, %eax
    movl %esi, %ecx
    sall %cl, %ebx
    andl %ebx, %eax
    popl %ebx
    popl %esi
    ret


    --
    Andy Shevchenko <andriy.shevchenko@linux.intel.com>
    Intel Finland Oy


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