Messages in this thread | | | Date | Tue, 14 Jul 2015 16:15:52 -0500 (CDT) | From | Christoph Lameter <> | Subject | Re: [Ksummit-discuss] [CORE TOPIC] lightweight per-cpu locks / restartable sequences |
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On Tue, 14 Jul 2015, Andy Lutomirski wrote:
> Crazy thought: At the risk of proposing something ridiculous, what if > we had per-cpu memory mappings? We could do this at the cost of up to > 2kB of memcpy whenever we switch mms. Expensive but maybe not a > showstopper.
This is not crazy and actually was done before. Itanium has that and its doable since the TLB insertion could be handled in software.
The problem on x86 is that one would need a separate page table for each processor for each task. There is no way to handle TLB faults in software to my knowledge.
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