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SubjectRe: [PATCH 1/5] atomics: add acquire/release/relaxed variants of some atomic operations
On Mon, Jul 13, 2015 at 01:31:23PM +0100, Will Deacon wrote:
> +
> +/*
> + * Relaxed variants of xchg, cmpxchg and some atomic operations.
> + *
> + * We support four variants:
> + *
> + * - Fully ordered: The default implementation, no suffix required.
> + * - Acquire: Provides ACQUIRE semantics, _acquire suffix.
> + * - Release: Provides RELEASE semantics, _release suffix.
> + * - Relaxed: No ordering guarantees, _relaxed suffix.
> + *
> + * See Documentation/memory-barriers.txt for ACQUIRE/RELEASE definitions.
> + */
> +
> +#ifndef atomic_read_acquire
> +#define atomic_read_acquire(v) smp_load_acquire(&(v)->counter)
> +#endif
> +
> +#ifndef atomic_set_release
> +#define atomic_set_release(v, i) smp_store_release(&(v)->counter, (i))
> +#endif
> +
> +#ifndef atomic_add_return_relaxed
> +#define atomic_add_return_relaxed atomic_add_return
> +#endif
> +#ifndef atomic_add_return_acquire
> +#define atomic_add_return_acquire atomic_add_return
> +#endif
> +#ifndef atomic_add_return_release
> +#define atomic_add_return_release atomic_add_return
> +#endif

Could we not define _{acquire,release} in terms of _relaxed and
smp_mb__{after,before}_atomic() ?

That way most archs really only need to implement _relaxed and be done
with it. ARM is special in that it actually has acquire/release
semantics in hardware (IA64 has it in the ISA but its not effective).



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