Messages in this thread | | | From | Andy Lutomirski <> | Date | Tue, 2 Jun 2015 12:41:27 -0700 | Subject | Re: [PATCH RFC] x86, tsc: Allow for high latency in quick_pit_calibrate() |
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On Tue, Jun 2, 2015 at 12:33 PM, Thomas Gleixner <tglx@linutronix.de> wrote: > On Thu, 21 May 2015, Adrian Hunter wrote: > >> If it takes longer than 12us to read the PIT counter lsb/msb, >> then the error margin will never fall below 500ppm within 50ms, >> and Fast TSC calibration will always fail. > > So finally the legacy PIT emulation takes longer than the 30 years old > hardware implementation. Progress! > >> This patch detects when that will happen and switches to using >> a slightly different algorithm that takes advantage of the PIT's >> latch comand. > > Is there really no smarter way to figure out the TSC frequency on > modern systems?
I just asked Len this question yesterday. intel_pstate can do it, although the algorithm is a bit gross.
--Andy
> > Thanks, > > tglx
-- Andy Lutomirski AMA Capital Management, LLC
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