Messages in this thread | | | Date | Fri, 8 May 2015 15:21:56 +0100 | From | Will Deacon <> | Subject | Re: Question about barriers for ARM on tools/perf/ |
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On Fri, May 08, 2015 at 03:16:20PM +0100, Peter Zijlstra wrote: > On Fri, May 08, 2015 at 11:04:59AM -0300, Arnaldo Carvalho de Melo wrote: > > Hi Will, > > > > I am working on moving the stuff we have for mb/rmb/wmb from > > tools/perf/perf-sys.h to tools/include/asm/barrier.h, redirecting > > to tools/arch/$ARCH/include/asm/barrier.h, to make it look like the > > kernel and who knows, at some point even share the source code. > > > > For now I am getting just what is needed for work on having > > atomic.h done in the same fashion, to implement refcounts for various > > perf data structures, starting with struct thread, for which I have > > a patch that makes perf survive in high core count machines where it > > currently crashes, most nobably 'perf top'. > > > > While doing that I noticed that arm64 implementation, lastly > > fixed in: > > > > f428ebd184c82a7914b2aa7e9f868918aaf7ea78 > > perf tools: Fix AAAAARGH64 memory barriers > > > > By peterz, it implements those barriers as: > > > > #define mb() asm volatile("dmb ish" ::: "memory") > > #define wmb() asm volatile("dmb ishst" ::: "memory") > > #define rmb() asm volatile("dmb ishld" ::: "memory") > > > > Which are not the same as in the kernel, i.e. in > > arch/arm64/include/asm/barrier.h, where the above are really smp_mb, > > smp_wmb and smp_rmb. > > > > Would it be enough for us to use the same implementation as the kernel? > > I.e. make it be: > > > > #define mb() asm volatile("dsb sy" ::: "memory") > > #define wmb() asm volatile("dsb st" ::: "memory") > > #define rmb() asm volatile("dsb ld" ::: "memory") > > > > ? If so I would then use those dsb/dmb macros, etc, to get tools/ to use > > the proper instructions, etc. > > > > I need now, for arm64, smp_mb, that is used by atomic_sub_return(), that > > in turn is used by atomic_dec_and_test(), that I need for refcounts. > > > > Can you clarify? > > The dmb things include a fence for IO, the dsb are only for between > CPUs. > > So for your work the dsb are fine.
Other way around ;)
(I relied separately anyway)
Will
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