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    SubjectRe: [PATCH V2 1/6] x86/MCE/AMD: Factor out logging mechanism
    On Wed, May 06, 2015 at 06:58:53AM -0500, Aravind Gopalakrishnan wrote:
    > Refactoring the code here to setup struct mce and call
    > mce_log() to log the error.
    >
    > No functional change is introduced.
    >
    > Doing this so we can use it later to log error when
    > deferred error interrupts happen.
    >
    > Suggested-by: Borislav Petkov <bp@alien8.de>
    > Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
    > ---
    > arch/x86/kernel/cpu/mcheck/mce_amd.c | 30 ++++++++++++++++++++----------
    > 1 file changed, 20 insertions(+), 10 deletions(-)
    >
    > diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
    > index 55ad9b3..60ae315 100644
    > --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
    > +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
    > @@ -264,6 +264,24 @@ init:
    > }
    > }
    >
    > +static void __log_error(unsigned int bank, bool is_thr, u64 misc)
    > +{
    > + struct mce m;
    > +
    > + mce_setup(&m);
    > + rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);
    > + if (!(m.status & MCI_STATUS_VAL))
    > + return;

    Yeah, let's save us the mce_setup() work in the !MCI_STATUS_VAL case:

    ---
    From: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
    Date: Wed, 6 May 2015 06:58:53 -0500
    Subject: [PATCH] x86/mce/amd: Factor out logging mechanism

    Refactor the code here to setup struct mce and call mce_log() to log
    the error. We're going to reuse this in a later patch as part of the
    deferred error interrupt enablement.

    No functional change is introduced.

    Suggested-by: Borislav Petkov <bp@alien8.de>
    Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
    Cc: Tony Luck <tony.luck@intel.com>
    Cc: x86-ml <x86@kernel.org>
    Cc: linux-edac <linux-edac@vger.kernel.org>
    Link: http://lkml.kernel.org/r/1430913538-1415-2-git-send-email-Aravind.Gopalakrishnan@amd.com
    Signed-off-by: Borislav Petkov <bp@suse.de>
    ---
    arch/x86/kernel/cpu/mcheck/mce_amd.c | 33 +++++++++++++++++++++++----------
    1 file changed, 23 insertions(+), 10 deletions(-)

    diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
    index 55ad9b37cae8..5f25de20db36 100644
    --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
    +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
    @@ -264,6 +264,27 @@ init:
    }
    }

    +static void __log_error(unsigned int bank, bool threshold_err, u64 misc)
    +{
    + struct mce m;
    + u64 status;
    +
    + rdmsrl(MSR_IA32_MCx_STATUS(bank), status);
    + if (!(status & MCI_STATUS_VAL))
    + return;
    +
    + mce_setup(&m);
    +
    + m.status = status;
    + m.bank = bank;
    + if (threshold_err)
    + m.misc = misc;
    +
    + mce_log(&m);
    +
    + wrmsrl(MSR_IA32_MCx_STATUS(bank), 0);
    +}
    +
    /*
    * APIC Interrupt Handler
    */
    @@ -273,12 +294,12 @@ init:
    * the interrupt goes off when error_count reaches threshold_limit.
    * the handler will simply log mcelog w/ software defined bank number.
    */
    +
    static void amd_threshold_interrupt(void)
    {
    u32 low = 0, high = 0, address = 0;
    int cpu = smp_processor_id();
    unsigned int bank, block;
    - struct mce m;

    /* assume first bank caused it */
    for (bank = 0; bank < mca_cfg.banks; ++bank) {
    @@ -321,15 +342,7 @@ static void amd_threshold_interrupt(void)
    return;

    log:
    - mce_setup(&m);
    - rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);
    - if (!(m.status & MCI_STATUS_VAL))
    - return;
    - m.misc = ((u64)high << 32) | low;
    - m.bank = bank;
    - mce_log(&m);
    -
    - wrmsrl(MSR_IA32_MCx_STATUS(bank), 0);
    + __log_error(bank, true, ((u64)high << 32) | low);
    }

    /*
    --
    2.3.5
    --
    Regards/Gruss,
    Boris.

    ECO tip #101: Trim your mails when you reply.
    --


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