Messages in this thread | | | Date | Fri, 22 May 2015 10:48:47 -0700 | Subject | Re: [PATCH 8/9] clk: pistachio: Add sanity checks on PLL configuration | From | Andrew Bresticker <> |
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On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia <ezequiel.garcia@imgtec.com> wrote: > From: Kevin Cernekee <cernekee@chromium.org> > > When setting the PLL rates, check that: > > - VCO is within range > - PFD is within range > - PLL is disabled when postdiv is changed > - postdiv2 <= postdiv1 > > Signed-off-by: Kevin Cernekee <cernekee@chromium.org> > Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
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