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SubjectRe: [PATCH v2 2/2] PCI: designware: use iATU0 for cfg and IO, iATU1 for MEM
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On Thu, Apr 30, 2015 at 1:52 PM, Jisheng Zhang <jszhang@marvell.com> wrote:
> Most transactions' type are cfg0 and MEM, so the Current iATU usage is not
> balanced, iATU0 is hot while iATU1 is rarely used. This patch refactors
> the iATU usage: iATU0 for cfg and IO, iATU1 for MEM. This allocation
> ideas comes from Minghuan Lian <Minghuan.Lian@freescale.com>:
>
> http://www.spinics.net/lists/linux-pci/msg40440.html
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>

Nice optimization of resources. Thanks :)

Acked-by: Pratyush Anand <pratyush.anand@gmail.com>


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