Messages in this thread | | | Date | Tue, 19 May 2015 12:53:52 +0100 | From | Matt Fleming <> | Subject | Re: [patch 1/6] x86, perf, cqm: Document PQR MSR abuse |
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On Tue, 19 May, at 12:00:50AM, Thomas Gleixner wrote: > The cqm code acts like it owns the PQR MSR completely. That's not true > because only the lower 10 bits are used for CQM. The upper 32bits are > used for CLass Of Service ID (closid). Document the abuse. Will be > fixed in a later patch. > > Signed-off-by: Thomas Gleixner <tglx@linutronix.de> > --- > arch/x86/kernel/cpu/perf_event_intel_cqm.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-)
Acked-by: Matt Fleming <matt.fleming@intel.com>
-- Matt Fleming, Intel Open Source Technology Center
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