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    SubjectRe: [PATCH v2] AHCI: Add generic MSI-X interrupt support to SATA PCI driver
    On 17.05.15 08:33:32, Alexander Gordeev wrote:
    > You enable MSI-X for a single chip, but introduce a change to the
    > generic AHCI code.
    >
    > In general MSI-X case, what makes you believe that IRQ vectors are
    > assigned continuously?
    >
    > (Interface ahci_host_activate() kinda expects a contiguous vector
    > range, but MSI-X does not guarantee that at all).

    That's the reason why I only enable single interrupt mode which our
    hardware supports.

    To not break other chips by this generic code change, there are the
    following precautions:

    * Interrupt ranges are not enabled at all.

    * Only single interrupt mode is enabled for msix cap devices. These
    devices require a single port only or a total number of int entries
    less than the total number of ports. In this case only one
    interrupt will be enabled.

    * During the discussion with Tejun we agreed to change the init
    sequence from msix-msi-intx to msi-msix-intx. Thus, if a device
    offers msi and init does not fail, the msix init code will not be
    executed. This is equivalent to current code.

    With this, the code only setups single mode msix as a last resort if
    msi fails. No interrupt range is enabled at all. Only one interrupt
    will be enabled. Considering all this I think your concerns are
    addressed.

    Also, the code can be easily extended for other devices and thus
    should be generic from the beginning.

    -Robert


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