Messages in this thread | | | Date | Fri, 15 May 2015 12:03:53 -0700 | From | Leonid Yegoshin <> | Subject | Re: [PATCH v2] MIPS64: Support of at least 48 bits of SEGBITS |
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On 05/15/2015 09:28 AM, David Daney wrote: > On 05/14/2015 06:34 PM, Leonid Yegoshin wrote: >> SEGBITS default is 40 bits or less, depending from CPU type. >> This patch introduces 48bits of application virtual address (SEGBITS) support. >> It is defined only for 16K and 64K pages and is optional (configurable). >> >> Penalty - a small number of additional pages for generic (small) applications. >> But for 64K pages it adds 3rd level of PTE structure, which has a little >> impact during software TLB refill. >> >> This patch is needed because MIPS I6XXX and P6XXX cores have 48 bit of >> virtual address in each segment (SEGBITS). >> > I'm concerned that the change log doesn't convey the true reason for the > patch. > > Many processors support larger VA space than is utilized by the kernel. > A choice was made to reduce the size of the VA space in order to > reduce TLB handling overhead. > > If the true reason for the patch is to enable larger VA space, say that. > But is it really required by those processors you mention? I doubt it. > > David Daney > >
Well, I was not aware about many processors capability, I can't find this kind of note anywhere.
And I assumed that statement "If unsure, say N" and the fact that it is configurable leads to conclusion that it is completely optional. I have a request from management to support 48bit VA but I understand that somebody may not like even small penalty.
In other side, this patch was required to test HW capability, GLIBC and application compatibility (I tested on buildroot FS).
So, if you still have concern, please propose a description statement.
- Leonid.
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