| From | Greg Kroah-Hartman <> | Subject | [PATCH 4.0 46/72] ASoC: rt5677: fixed wrong DMIC ref clock | Date | Mon, 11 May 2015 10:54:52 -0700 |
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4.0-stable review patch. If anyone has any objections, please let me know.
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From: Bard Liao <bardliao@realtek.com>
commit 60a8d62b8497c23eb3d48149af7e55dac2dd83a2 upstream.
DMIC clock source is not from codec system clock directly. it is generated from the division of system clock. And it should be 256 * sample rate of AIF1.
Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- sound/soc/codecs/rt5677.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
--- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c @@ -904,7 +904,7 @@ static int set_dmic_clk(struct snd_soc_d { struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); - int idx = rl6231_calc_dmic_clk(rt5677->sysclk); + int idx = rl6231_calc_dmic_clk(rt5677->lrck[RT5677_AIF1] << 8); if (idx < 0) dev_err(codec->dev, "Failed to set DMIC clock\n");
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