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    SubjectRe: [PATCH RFC v9 11/20] drm/bridge: Add Synopsys DesignWare MIPI DSI host controller driver
    On Thu, Feb 12, 2015 at 02:01:34PM +0800, Liu Ying wrote:
    [...]
    > diff --git a/drivers/gpu/drm/bridge/dw_mipi_dsi.c b/drivers/gpu/drm/bridge/dw_mipi_dsi.c
    [...]
    > +struct dw_mipi_dsi {
    > + struct mipi_dsi_host dsi_host;
    > + struct drm_connector connector;
    > + struct drm_encoder *encoder;
    > + struct drm_bridge *bridge;
    > + struct drm_panel *panel;
    > + struct device *dev;
    > +
    > + void __iomem *base;
    > +
    > + struct clk *pllref_clk;
    > + struct clk *cfg_clk;
    > + struct clk *pclk;
    > +
    > + unsigned int lane_mbps; /* per lane */
    > + u32 channel;
    > + u32 lanes;
    > + u32 format;
    > + struct drm_display_mode *mode;
    > +
    > + const struct dw_mipi_dsi_plat_data *pdata;
    > +
    > + bool enabled;
    > +};

    While reviewing this I kept thinking whether this is really the right
    architectural design. This driver is a MIPI DSI host, a connector and
    a bridge, all in one. But it seems to me like it should really be an
    encoder/connector and a MIPI DSI host. Why the need for a bridge? The
    bridge abstraction targets blocks outside of the SoC, but it is my
    understanding that these DesignWare IP blocks are designed into SoCs.

    Thierry
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