Messages in this thread | | | Date | Thu, 30 Apr 2015 16:23:26 -0700 | From | "H. Peter Anvin" <> | Subject | Re: [PATCH] x86_64, asm: Work around AMD SYSRET SS descriptor attribute issue |
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On 04/30/2015 02:39 PM, H. Peter Anvin wrote: > This is the microbenchmark I used. > > For the record, Intel's intention going forward is that 0F 1F will > always be as fast or faster than any other alternative. >
I probably should have added that the microbenchmark specifically tests for an atomic 5-byte NOP (as required by tracepoints etc.) If the requirement for 5-byte atomic is dropped there might be faster combinations, e.g. 66 66 66 90 might work better on some platforms, or using very long 0F 1F sequences.
-hpa
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