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    Subject[PATCH 4/4] x86/mce/amd: Rename setup_APIC_mce
    Date
    'setup_APIC_mce' doesn't give us an indication of why we are
    going to program LVT. Make that explicit by renaming it to
    setup_APIC_mce_threshold so we know.

    No functional change is introduced.

    Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
    ---
    arch/x86/kernel/cpu/mcheck/mce_amd.c | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
    index ce82f0b..2952864 100644
    --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
    +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
    @@ -215,7 +215,7 @@ static void mce_threshold_block_init(struct threshold_block *b, int offset)
    threshold_restart_bank(&tr);
    };

    -static int setup_APIC_mce(int reserved, int new)
    +static int setup_APIC_mce_threshold(int reserved, int new)
    {
    if (reserved < 0 && !setup_APIC_eilvt(new, THRESHOLD_APIC_VECTOR,
    APIC_EILVT_MSG_FIX, 0))
    @@ -327,7 +327,7 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)

    b.interrupt_enable = 1;
    new = (high & MASK_LVTOFF_HI) >> 20;
    - offset = setup_APIC_mce(offset, new);
    + offset = setup_APIC_mce_threshold(offset, new);

    if ((offset == new) &&
    (mce_threshold_vector != amd_threshold_interrupt))
    --
    1.9.1


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