Messages in this thread | | | Date | Tue, 28 Apr 2015 16:38:05 -0700 | Subject | Re: PCID and TLB flushes (was: [GIT PULL] kdbus for 4.1-rc1) | From | Linus Torvalds <> |
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On Tue, Apr 28, 2015 at 4:23 PM, Andy Lutomirski <luto@amacapital.net> wrote: > > I think we can do it without that by keeping the mapping in reverse as > I sort of outlined -- for each cpu, store a mapping from mm to pcid. > When things fall out of the list, no big deal.
So you do it by just having a per-cpu array of (say, 64 entries), you now end up having to search that every time you do a task switch to find the asid for the mm. And even then you've limited yourself to just six bits, because doing the same for a possible full 12-bit asid would not be possible.
It's actually much simpler if you just do it the other way.
But hey, maybe you do something clever and can figure out a good way to do it. I'm just saying that we *have* done this before on other architectures, and it has worked. I think ARM has another asid implementation in arch/arm/mm/context.c. I really think it would be a good idea to copy some existing case rather than make up a new one. It's not like asid's are unusual. It's arguably x86 that was unusual in _not_ having them.
Linus
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