Messages in this thread | | | Date | Tue, 28 Apr 2015 15:56:29 -0700 | Subject | Re: PCID and TLB flushes (was: [GIT PULL] kdbus for 4.1-rc1) | From | Linus Torvalds <> |
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On Tue, Apr 28, 2015 at 3:15 PM, Kirill A. Shutemov <kirill@shutemov.name> wrote: > > I talked with Dave about implementing PCID and he thinks that it will be > net loss.
So I'm told that Suresh Siddha actually had a patch inside Intel to use PCID (back when he worked for Intel, I think he left), and that it was a wash in their testing.
I never saw the patch, and it might be interesting to try it again, but there is some reason to believe that it doesn't make much of a difference. Unlike most of the traditional RISC machines that got big speedups, Intel TLB walking is so good that it likely isn't nearly as noticeable, and it likely *does* result in more IPI's etc. Possibly not a lot more, but if the win isn't big...
So I don't want to discourage you, because I'd love to see what the patch looks like and if we can find cases where it matters, but I do want to set expectations right. It's unlikely to be a big issue.
Linus
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