lkml.org 
[lkml]   [2015]   [Apr]   [24]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH V3 14/25] perf tools: Add Intel PT instruction decoder
    Date
    Add support for decoding instructions for Intel
    Processor Trace. The kernel x86 instruction
    decoder is used for this.

    Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
    ---
    tools/build/Makefile.build | 2 +
    tools/perf/.gitignore | 2 +
    tools/perf/Makefile.perf | 6 +-
    tools/perf/util/intel-pt-decoder/Build | 15 +-
    .../util/intel-pt-decoder/intel-pt-insn-decoder.c | 246 +++++++++++++++++++++
    .../util/intel-pt-decoder/intel-pt-insn-decoder.h | 65 ++++++
    6 files changed, 333 insertions(+), 3 deletions(-)
    create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c
    create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h

    diff --git a/tools/build/Makefile.build b/tools/build/Makefile.build
    index 10df572..7ad74e4 100644
    --- a/tools/build/Makefile.build
    +++ b/tools/build/Makefile.build
    @@ -57,6 +57,8 @@ quiet_cmd_cc_i_c = CPP $@
    quiet_cmd_cc_s_c = AS $@
    cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $<

    +quiet_cmd_gen = GEN $@
    +
    # Link agregate command
    # If there's nothing to link, create empty $@ object.
    quiet_cmd_ld_multi = LD $@
    diff --git a/tools/perf/.gitignore b/tools/perf/.gitignore
    index 812f904..c88d5c5 100644
    --- a/tools/perf/.gitignore
    +++ b/tools/perf/.gitignore
    @@ -28,3 +28,5 @@ config.mak.autogen
    *-flex.*
    *.pyc
    *.pyo
    +util/intel-pt-decoder/inat-tables.c
    +util/intel-pt-decoder/inat.c
    diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf
    index 03409cc..0699220 100644
    --- a/tools/perf/Makefile.perf
    +++ b/tools/perf/Makefile.perf
    @@ -122,6 +122,7 @@ INSTALL = install
    FLEX = flex
    BISON = bison
    STRIP = strip
    +AWK = awk

    LIB_DIR = $(srctree)/tools/lib/api/
    TRACE_EVENT_DIR = $(srctree)/tools/lib/traceevent/
    @@ -272,7 +273,7 @@ strip: $(PROGRAMS) $(OUTPUT)perf

    PERF_IN := $(OUTPUT)perf-in.o

    -export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX
    +export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX AWK
    build := -f $(srctree)/tools/build/Makefile.build dir=. obj

    $(PERF_IN): $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)common-cmds.h FORCE
    @@ -532,7 +533,8 @@ clean: $(LIBTRACEEVENT)-clean $(LIBAPI)-clean config-clean
    $(Q)find . -name '*.o' -delete -o -name '\.*.cmd' -delete -o -name '\.*.d' -delete
    $(Q)$(RM) .config-detected
    $(call QUIET_CLEAN, core-progs) $(RM) $(ALL_PROGRAMS) perf perf-read-vdso32 perf-read-vdsox32
    - $(call QUIET_CLEAN, core-gen) $(RM) *.spec *.pyc *.pyo */*.pyc */*.pyo $(OUTPUT)common-cmds.h TAGS tags cscope* $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)FEATURE-DUMP $(OUTPUT)util/*-bison* $(OUTPUT)util/*-flex*
    + $(call QUIET_CLEAN, core-gen) $(RM) *.spec *.pyc *.pyo */*.pyc */*.pyo $(OUTPUT)common-cmds.h TAGS tags cscope* $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)FEATURE-DUMP $(OUTPUT)util/*-bison* $(OUTPUT)util/*-flex* \
    + $(OUTPUT)util/intel-pt-decoder/inat.c $(OUTPUT)util/intel-pt-decoder/inat-tables.c
    $(QUIET_SUBDIR0)Documentation $(QUIET_SUBDIR1) clean
    $(python-clean)

    diff --git a/tools/perf/util/intel-pt-decoder/Build b/tools/perf/util/intel-pt-decoder/Build
    index 9d67381..b608469 100644
    --- a/tools/perf/util/intel-pt-decoder/Build
    +++ b/tools/perf/util/intel-pt-decoder/Build
    @@ -1 +1,14 @@
    -libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o
    +libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o intel-pt-insn-decoder.o
    +
    +inat_tables_script = ../../arch/x86/tools/gen-insn-attr-x86.awk
    +inat_tables_maps = ../../arch/x86/lib/x86-opcode-map.txt
    +
    +$(OUTPUT)util/intel-pt-decoder/inat-tables.c: $(inat_tables_script) $(inat_tables_maps)
    + @$(call echo-cmd,gen)$(AWK) -f $(inat_tables_script) $(inat_tables_maps) > $@ || rm -f $@
    +
    +$(OUTPUT)util/intel-pt-decoder/inat.c:
    + @$(call echo-cmd,gen)cp ../../arch/x86/lib/inat.c $(OUTPUT)util/intel-pt-decoder/inat.c
    +
    +$(OUTPUT)util/intel-pt-decoder/intel-pt-insn-decoder.o: $(OUTPUT)util/intel-pt-decoder/inat.c $(OUTPUT)util/intel-pt-decoder/inat-tables.c
    +
    +CFLAGS_intel-pt-insn-decoder.o += -I../../arch/x86/include -I$(OUTPUT)util/intel-pt-decoder -I../../arch/x86/lib
    diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c
    new file mode 100644
    index 0000000..2fa82c5
    --- /dev/null
    +++ b/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c
    @@ -0,0 +1,246 @@
    +/*
    + * intel_pt_insn_decoder.c: Intel Processor Trace support
    + * Copyright (c) 2013-2014, Intel Corporation.
    + *
    + * This program is free software; you can redistribute it and/or modify it
    + * under the terms and conditions of the GNU General Public License,
    + * version 2, as published by the Free Software Foundation.
    + *
    + * This program is distributed in the hope it will be useful, but WITHOUT
    + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
    + * more details.
    + *
    + */
    +
    +#include <stdio.h>
    +#include <string.h>
    +#include <endian.h>
    +#include <byteswap.h>
    +
    +#include "event.h"
    +
    +#include <asm/insn.h>
    +
    +#include "inat.c"
    +#include <insn.c>
    +
    +#include "intel-pt-insn-decoder.h"
    +
    +/* Based on branch_type() from perf_event_intel_lbr.c */
    +static void intel_pt_insn_decoder(struct insn *insn,
    + struct intel_pt_insn *intel_pt_insn)
    +{
    + enum intel_pt_insn_op op = INTEL_PT_OP_OTHER;
    + enum intel_pt_insn_branch branch = INTEL_PT_BR_NO_BRANCH;
    + int ext;
    +
    + if (insn_is_avx(insn)) {
    + intel_pt_insn->op = INTEL_PT_OP_OTHER;
    + intel_pt_insn->branch = INTEL_PT_BR_NO_BRANCH;
    + intel_pt_insn->length = insn->length;
    + return;
    + }
    +
    + switch (insn->opcode.bytes[0]) {
    + case 0xf:
    + switch (insn->opcode.bytes[1]) {
    + case 0x05: /* syscall */
    + case 0x34: /* sysenter */
    + op = INTEL_PT_OP_SYSCALL;
    + branch = INTEL_PT_BR_INDIRECT;
    + break;
    + case 0x07: /* sysret */
    + case 0x35: /* sysexit */
    + op = INTEL_PT_OP_SYSRET;
    + branch = INTEL_PT_BR_INDIRECT;
    + break;
    + case 0x80 ... 0x8f: /* jcc */
    + op = INTEL_PT_OP_JCC;
    + branch = INTEL_PT_BR_CONDITIONAL;
    + break;
    + default:
    + break;
    + }
    + break;
    + case 0x70 ... 0x7f: /* jcc */
    + op = INTEL_PT_OP_JCC;
    + branch = INTEL_PT_BR_CONDITIONAL;
    + break;
    + case 0xc2: /* near ret */
    + case 0xc3: /* near ret */
    + case 0xca: /* far ret */
    + case 0xcb: /* far ret */
    + op = INTEL_PT_OP_RET;
    + branch = INTEL_PT_BR_INDIRECT;
    + break;
    + case 0xcf: /* iret */
    + op = INTEL_PT_OP_IRET;
    + branch = INTEL_PT_BR_INDIRECT;
    + break;
    + case 0xcc ... 0xce: /* int */
    + op = INTEL_PT_OP_INT;
    + branch = INTEL_PT_BR_INDIRECT;
    + break;
    + case 0xe8: /* call near rel */
    + op = INTEL_PT_OP_CALL;
    + branch = INTEL_PT_BR_UNCONDITIONAL;
    + break;
    + case 0x9a: /* call far absolute */
    + op = INTEL_PT_OP_CALL;
    + branch = INTEL_PT_BR_INDIRECT;
    + break;
    + case 0xe0 ... 0xe2: /* loop */
    + op = INTEL_PT_OP_LOOP;
    + branch = INTEL_PT_BR_CONDITIONAL;
    + break;
    + case 0xe3: /* jcc */
    + op = INTEL_PT_OP_JCC;
    + branch = INTEL_PT_BR_CONDITIONAL;
    + break;
    + case 0xe9: /* jmp */
    + case 0xeb: /* jmp */
    + op = INTEL_PT_OP_JMP;
    + branch = INTEL_PT_BR_UNCONDITIONAL;
    + break;
    + case 0xea: /* far jmp */
    + op = INTEL_PT_OP_JMP;
    + branch = INTEL_PT_BR_INDIRECT;
    + break;
    + case 0xff: /* call near absolute, call far absolute ind */
    + ext = (insn->modrm.bytes[0] >> 3) & 0x7;
    + switch (ext) {
    + case 2: /* near ind call */
    + case 3: /* far ind call */
    + op = INTEL_PT_OP_CALL;
    + branch = INTEL_PT_BR_INDIRECT;
    + break;
    + case 4:
    + case 5:
    + op = INTEL_PT_OP_JMP;
    + branch = INTEL_PT_BR_INDIRECT;
    + break;
    + default:
    + break;
    + }
    + break;
    + default:
    + break;
    + }
    +
    + intel_pt_insn->op = op;
    + intel_pt_insn->branch = branch;
    + intel_pt_insn->length = insn->length;
    +
    + if (branch == INTEL_PT_BR_CONDITIONAL ||
    + branch == INTEL_PT_BR_UNCONDITIONAL) {
    +#if __BYTE_ORDER == __BIG_ENDIAN
    + switch (insn->immediate.nbytes) {
    + case 1:
    + intel_pt_insn->rel = insn->immediate.value;
    + break;
    + case 2:
    + intel_pt_insn->rel =
    + bswap_16((short)insn->immediate.value);
    + break;
    + case 4:
    + intel_pt_insn->rel = bswap_32(insn->immediate.value);
    + break;
    + }
    +#else
    + intel_pt_insn->rel = insn->immediate.value;
    +#endif
    + }
    +}
    +
    +int intel_pt_get_insn(const unsigned char *buf, size_t len, int x86_64,
    + struct intel_pt_insn *intel_pt_insn)
    +{
    + struct insn insn;
    +
    + insn_init(&insn, buf, len, x86_64);
    + insn_get_length(&insn);
    + if (!insn_complete(&insn) || insn.length > len)
    + return -1;
    + intel_pt_insn_decoder(&insn, intel_pt_insn);
    + if (insn.length < INTEL_PT_INSN_DBG_BUF_SZ)
    + memcpy(intel_pt_insn->buf, buf, insn.length);
    + else
    + memcpy(intel_pt_insn->buf, buf, INTEL_PT_INSN_DBG_BUF_SZ);
    + return 0;
    +}
    +
    +const char *branch_name[] = {
    + [INTEL_PT_OP_OTHER] = "Other",
    + [INTEL_PT_OP_CALL] = "Call",
    + [INTEL_PT_OP_RET] = "Ret",
    + [INTEL_PT_OP_JCC] = "Jcc",
    + [INTEL_PT_OP_JMP] = "Jmp",
    + [INTEL_PT_OP_LOOP] = "Loop",
    + [INTEL_PT_OP_IRET] = "IRet",
    + [INTEL_PT_OP_INT] = "Int",
    + [INTEL_PT_OP_SYSCALL] = "Syscall",
    + [INTEL_PT_OP_SYSRET] = "Sysret",
    +};
    +
    +const char *intel_pt_insn_name(enum intel_pt_insn_op op)
    +{
    + return branch_name[op];
    +}
    +
    +int intel_pt_insn_desc(const struct intel_pt_insn *intel_pt_insn, char *buf,
    + size_t buf_len)
    +{
    + switch (intel_pt_insn->branch) {
    + case INTEL_PT_BR_CONDITIONAL:
    + case INTEL_PT_BR_UNCONDITIONAL:
    + return snprintf(buf, buf_len, "%s %s%d",
    + intel_pt_insn_name(intel_pt_insn->op),
    + intel_pt_insn->rel > 0 ? "+" : "",
    + intel_pt_insn->rel);
    + case INTEL_PT_BR_NO_BRANCH:
    + case INTEL_PT_BR_INDIRECT:
    + return snprintf(buf, buf_len, "%s",
    + intel_pt_insn_name(intel_pt_insn->op));
    + default:
    + break;
    + }
    + return 0;
    +}
    +
    +size_t intel_pt_insn_max_size(void)
    +{
    + return MAX_INSN_SIZE;
    +}
    +
    +int intel_pt_insn_type(enum intel_pt_insn_op op)
    +{
    + switch (op) {
    + case INTEL_PT_OP_OTHER:
    + return 0;
    + case INTEL_PT_OP_CALL:
    + return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL;
    + case INTEL_PT_OP_RET:
    + return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_RETURN;
    + case INTEL_PT_OP_JCC:
    + return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CONDITIONAL;
    + case INTEL_PT_OP_JMP:
    + return PERF_IP_FLAG_BRANCH;
    + case INTEL_PT_OP_LOOP:
    + return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CONDITIONAL;
    + case INTEL_PT_OP_IRET:
    + return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_RETURN |
    + PERF_IP_FLAG_INTERRUPT;
    + case INTEL_PT_OP_INT:
    + return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
    + PERF_IP_FLAG_INTERRUPT;
    + case INTEL_PT_OP_SYSCALL:
    + return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
    + PERF_IP_FLAG_SYSCALLRET;
    + case INTEL_PT_OP_SYSRET:
    + return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_RETURN |
    + PERF_IP_FLAG_SYSCALLRET;
    + default:
    + return 0;
    + }
    +}
    diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h b/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h
    new file mode 100644
    index 0000000..b0adbf3
    --- /dev/null
    +++ b/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h
    @@ -0,0 +1,65 @@
    +/*
    + * intel_pt_insn_decoder.h: Intel Processor Trace support
    + * Copyright (c) 2013-2014, Intel Corporation.
    + *
    + * This program is free software; you can redistribute it and/or modify it
    + * under the terms and conditions of the GNU General Public License,
    + * version 2, as published by the Free Software Foundation.
    + *
    + * This program is distributed in the hope it will be useful, but WITHOUT
    + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
    + * more details.
    + *
    + */
    +
    +#ifndef INCLUDE__INTEL_PT_INSN_DECODER_H__
    +#define INCLUDE__INTEL_PT_INSN_DECODER_H__
    +
    +#include <stddef.h>
    +#include <stdint.h>
    +
    +#define INTEL_PT_INSN_DESC_MAX 32
    +#define INTEL_PT_INSN_DBG_BUF_SZ 16
    +
    +enum intel_pt_insn_op {
    + INTEL_PT_OP_OTHER,
    + INTEL_PT_OP_CALL,
    + INTEL_PT_OP_RET,
    + INTEL_PT_OP_JCC,
    + INTEL_PT_OP_JMP,
    + INTEL_PT_OP_LOOP,
    + INTEL_PT_OP_IRET,
    + INTEL_PT_OP_INT,
    + INTEL_PT_OP_SYSCALL,
    + INTEL_PT_OP_SYSRET,
    +};
    +
    +enum intel_pt_insn_branch {
    + INTEL_PT_BR_NO_BRANCH,
    + INTEL_PT_BR_INDIRECT,
    + INTEL_PT_BR_CONDITIONAL,
    + INTEL_PT_BR_UNCONDITIONAL,
    +};
    +
    +struct intel_pt_insn {
    + enum intel_pt_insn_op op;
    + enum intel_pt_insn_branch branch;
    + int length;
    + int32_t rel;
    + unsigned char buf[INTEL_PT_INSN_DBG_BUF_SZ];
    +};
    +
    +int intel_pt_get_insn(const unsigned char *buf, size_t len, int x86_64,
    + struct intel_pt_insn *intel_pt_insn);
    +
    +const char *intel_pt_insn_name(enum intel_pt_insn_op op);
    +
    +int intel_pt_insn_desc(const struct intel_pt_insn *intel_pt_insn, char *buf,
    + size_t buf_len);
    +
    +size_t intel_pt_insn_max_size(void);
    +
    +int intel_pt_insn_type(enum intel_pt_insn_op op);
    +
    +#endif
    --
    1.9.1


    \
     
     \ /
      Last update: 2015-04-24 21:41    [W:2.483 / U:0.092 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site