Messages in this thread | | | Date | Fri, 17 Apr 2015 19:20:14 +0300 | From | Sergei Shtylyov <> | Subject | Re: [PATCH 07/14] devicetree: Add bindings for the ATH79 PLL controllers |
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On 04/17/2015 05:24 PM, Alban Bedel wrote:
> Signed-off-by: Alban Bedel <albeu@free.fr> > --- > .../devicetree/bindings/clock/qca,ath79-pll.txt | 33 ++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qca,ath79-pll.txt
> diff --git a/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt b/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt > new file mode 100644 > index 0000000..2d2da3f > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt > @@ -0,0 +1,33 @@ > +Binding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller > + > +The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB. > + > +Required Properties: > +- compatible: has to be "qca,<soctype>-cpu-intc" and one of the following > + fallback:
Fallbacks.
> + - "qca,ar7100-pll" > + - "qca,ar7240-pll" > + - "qca,ar9130-pll" > + - "qca,ar9330-pll" > + - "qca,ar9340-pll" > + - "qca,ar9550-pll" > +- reg: Base address and size of the controllers memory area > +- clock-names: Name of the input clock, has to be "ref" > +- clock: phandle of the external reference clock
The prop name is "clocks", not "clock".
[...]
WBR, Sergei
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