Messages in this thread | | | From | Andy Lutomirski <> | Date | Sun, 29 Mar 2015 14:12:19 -0700 | Subject | Re: [PATCH] x86/asm/entry/64: better check for canonical address |
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On Sun, Mar 29, 2015 at 12:36 PM, Denys Vlasenko <vda.linux@googlemail.com> wrote: > On Sat, Mar 28, 2015 at 10:11 AM, Ingo Molnar <mingo@kernel.org> wrote: >>> >> $ ./timing_test64 iret >>> >> 10000 loops in 0.00344s = 343.90 nsec/loop for iret >>> >> 100000 loops in 0.01890s = 188.97 nsec/loop for iret >>> >> 1000000 loops in 0.08228s = 82.28 nsec/loop for iret >>> >> 10000000 loops in 0.77910s = 77.91 nsec/loop for iret >>> >> >>> >> This is the "same-ring interrupt return". ~230 cycles! :( >>> > >>> > Ugh, that's really expensive! Why is that so? Same-ring irqs are >>> > supposedly a lot simpler. >>> >>> Descriptor checks for restored CS and SS, >>> checking canonical-ness of RIP, >>> supporting "return to TSS" (flags.NT bit), >>> "return to VM86" (flags.VM bit), >>> complex logic around restoring RFLAGS >>> ("don't allow CPL3 to be able to disable interrupts... >>> ...unless their flags.IOPL is 3." Gasp) >>> return to 16-bit code ("do not touch high 16 bits") >>> >>> All of this is a giant PITA to encode in microcode. >> >> I guess they could optimize it by adding a single "I am a modern OS >> executing regular userspace" flag to the descriptor [or expressing the >> same as a separate instruction], to avoid all that legacy crap that >> won't trigger on like 99.999999% of systems ... > > Yes, that would be a useful addition. Interrupt servicing on x86 > takes a non-negligible hit because of IRET slowness. > > Specifically, a CPL0-only IRET_FAST insn which uses the same stack layout > as IRET, but makes the following assumptions: > > * The restored SS and CS are 0-based, 4G-limit segments. > (as usual, in 64-bit mode limits are ignored). > * CS is read/execute, SS is read/write. > * The CPL to return to is equal to (CS & 3). > > This would mean that IRET_FAST would not need to read descriptors > from GDT/LDT. It only needs to read values from stack. > > It would be capable of returning both to CPL0 and CPL3 - iow, > usable for returning from interrupts both to userpace and kernelspace. > > * FLAGS.NT is ignored (as if it is 0). IOW, no task returns. > * pt_regs->FLAGS.VM is not restored, but set to 0. > IOW, no vm86. > * Extend this to other flags as well, if it makes return faster. > We can have a separate code which restores AC,DF,IF,TF,RF,IOPL > in the unlikely event they are "unusual". So it's okay > if IRET_FAST just sets them to 0 (1 for IF). > > The instruction would need a differentiator whether returned-to code > is 64-bit or 32-bit. > Then it probably can use the same approach SYSRET{O,L} uses: > with REX.W, return is to 64-bit; without it, return is to 32-bit. > > Interrupt return then can check pt_regs->cs and use > IRETL_FAST if it is USER32_CS; use IRETQ_FAST if it is USER_CS > or KERNEL_CS; otherwise, fall back to slow but "universal" IRETQ. > > Do we have contacts at Intel to petition for this? :D
Some of us do and have petitioned :)
--Andy
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