lkml.org 
[lkml]   [2015]   [Mar]   [18]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH 1/6] ARM: STi: DT: STiH407: Fix retime pin mask for PIO5 and PIO35
Date
From: Karim BEN BELGACEM <karim.ben-belgacem@st.com>

This will avoid programming the retime registers when not implemented

- PIO5 : no retime registers assigned to pins 6 and 7
- PIO35 : pin 7 is reserved so no retime register assigned to it

Signed-off-by: Karim BEN BELGACEM <karim.ben-belgacem@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
arch/arm/boot/dts/stih407-pinctrl.dtsi | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index 402844c..0a754f2 100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -104,6 +104,7 @@
#interrupt-cells = <2>;
reg = <0x5000 0x100>;
st,bank-name = "PIO5";
+ st,retime-pin-mask = <0x3f>;
};

rc {
@@ -519,6 +520,7 @@
#interrupt-cells = <2>;
reg = <0x5000 0x100>;
st,bank-name = "PIO35";
+ st,retime-pin-mask = <0x7f>;
};

i2c4 {
--
1.9.1


\
 
 \ /
  Last update: 2015-03-18 12:01    [W:0.112 / U:0.388 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site