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    SubjectRe: [PATCH 2/2] x86, perf: Use INST_RETIRED.PREC_DIST for cycles:ppp
    On Mon, Nov 30, 2015 at 04:28:09PM -0800, Andi Kleen wrote:
    > diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
    > index 9dfbba5..ba41899 100644
    > --- a/arch/x86/kernel/cpu/perf_event.c
    > +++ b/arch/x86/kernel/cpu/perf_event.c
    > @@ -482,6 +482,9 @@ int x86_pmu_hw_config(struct perf_event *event)
    > /* Support for IP fixup */
    > if (x86_pmu.lbr_nr || x86_pmu.intel_cap.pebs_format >= 2)
    > precise++;
    > +
    > + if (x86_pmu.pebs_aliases)
    > + precise++;

    This is not accurate, it would allow :ppp for core2 for example, which
    does not at all support PREC_DIST events.

    Something like so on top?

    --- a/arch/x86/kernel/cpu/perf_event.c
    +++ b/arch/x86/kernel/cpu/perf_event.c
    @@ -483,7 +483,7 @@ int x86_pmu_hw_config(struct perf_event
    if (x86_pmu.lbr_nr || x86_pmu.intel_cap.pebs_format >= 2)
    precise++;

    - if (x86_pmu.pebs_aliases)
    + if (x86_pmu.pebs_prec_dist)
    precise++;
    }

    --- a/arch/x86/kernel/cpu/perf_event.h
    +++ b/arch/x86/kernel/cpu/perf_event.h
    @@ -593,7 +593,8 @@ struct x86_pmu {
    bts_active :1,
    pebs :1,
    pebs_active :1,
    - pebs_broken :1;
    + pebs_broken :1,
    + pebs_prec_dist :1;
    int pebs_record_size;
    void (*drain_pebs)(struct pt_regs *regs);
    struct event_constraint *pebs_constraints;
    --- a/arch/x86/kernel/cpu/perf_event_intel.c
    +++ b/arch/x86/kernel/cpu/perf_event_intel.c
    @@ -3470,6 +3470,7 @@ __init int intel_pmu_init(void)
    x86_pmu.event_constraints = intel_ivb_event_constraints;
    x86_pmu.pebs_constraints = intel_ivb_pebs_event_constraints;
    x86_pmu.pebs_aliases = intel_pebs_aliases_ivb;
    + x86_pmu.pebs_prec_dist = true;
    if (boot_cpu_data.x86_model == 62)
    x86_pmu.extra_regs = intel_snbep_extra_regs;
    else
    @@ -3503,6 +3504,7 @@ __init int intel_pmu_init(void)
    x86_pmu.pebs_constraints = intel_hsw_pebs_event_constraints;
    x86_pmu.extra_regs = intel_snbep_extra_regs;
    x86_pmu.pebs_aliases = intel_pebs_aliases_ivb;
    + x86_pmu.pebs_prec_dist = true;
    /* all extra regs are per-cpu when HT is on */
    x86_pmu.flags |= PMU_FL_HAS_RSP_1;
    x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
    @@ -3538,6 +3540,7 @@ __init int intel_pmu_init(void)
    x86_pmu.pebs_constraints = intel_hsw_pebs_event_constraints;
    x86_pmu.extra_regs = intel_snbep_extra_regs;
    x86_pmu.pebs_aliases = intel_pebs_aliases_ivb;
    + x86_pmu.pebs_prec_dist = true;
    /* all extra regs are per-cpu when HT is on */
    x86_pmu.flags |= PMU_FL_HAS_RSP_1;
    x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
    @@ -3560,6 +3563,7 @@ __init int intel_pmu_init(void)
    x86_pmu.pebs_constraints = intel_skl_pebs_event_constraints;
    x86_pmu.extra_regs = intel_skl_extra_regs;
    x86_pmu.pebs_aliases = intel_pebs_aliases_skl;
    + x86_pmu.pebs_prec_dist = true;
    /* all extra regs are per-cpu when HT is on */
    x86_pmu.flags |= PMU_FL_HAS_RSP_1;
    x86_pmu.flags |= PMU_FL_NO_HT_SHARING;

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