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SubjectRe: [PATCH V5 Base on RC7 3/3] Add reset controller for hi6220 SoC platform.
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Am Dienstag, den 27.10.2015, 17:51 +0800 schrieb Chen Feng:
> reset: add driver for hi6220 reset controller
>
> Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
> ---
> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index 3f03380..3f055e2 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -167,5 +167,12 @@
> clocks = <&ao_ctrl 36>, <&ao_ctrl 36>;
> clock-names = "uartclk", "apb_pclk";
> };
> +
> + reset_ctrl: reset_ctrl@f7030000 {
> + compatible = "hisilicon,hi6220-reset-ctl";
> + reg = <0x0 0xf7030000 0x0 0x1000>;
> + #reset-cells = <1>;
> + };
> +

While applying I just noticed that the device tree already contains a
node claiming the same address space:

sys_ctrl: sys_ctrl@f7030000 {
compatible = "hisilicon,hi6220-sysctrl", "syscon";
reg = <0x0 0xf7030000 0x0 0x2000>;
#clock-cells = <1>;
};

It is documented in
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt and
Documentation/devicetree/bindings/clock/hi6220-clock.txt.

Could you clarify whether the reset controls are just part of the
sys_ctrl block? If so, I think you should add #reset-cells = <1> to the
sys_ctrl node instead.

regards
Philipp



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