Messages in this thread | | | Date | Fri, 16 Oct 2015 11:31:12 +0100 | From | James Hogan <> | Subject | Re: [PATCH v7,3/3] MIPS: dts: jz4780/ci20: Add NEMC, BCH and NAND device tree nodes |
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Hi Alex,
On Fri, Oct 16, 2015 at 11:11:29AM +0100, Alex Smith wrote: > Hi James, > > On 15 October 2015 at 09:47, James Hogan <james.hogan@imgtec.com> wrote: > >> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts > >> index 9fcb9e7..453f1d3 100644 > >> --- a/arch/mips/boot/dts/ingenic/ci20.dts > >> +++ b/arch/mips/boot/dts/ingenic/ci20.dts > >> @@ -42,3 +42,57 @@ > >> &uart4 { > >> status = "okay"; > >> }; > >> + > >> +&nemc { > >> + status = "okay"; > >> + > >> + nand: nand@1 { > >> + compatible = "ingenic,jz4780-nand"; > > > > Isn't the NAND a micron part? This doesn't seem right. Is the device > > driver and binding already accepted upstream with that compatible > > string? > > This is the compatible string for the JZ4780 NAND driver, this patch > is part of the series adding that. Detection of the NAND part is > handled by the MTD subsystem.
Right (didn't spot that it was part of a series).
The node appears to describe the NAND interface itself, i.e. a part of the SoC, so should be in the SoC dtsi file, with overrides in the board file if necessary for it to work with a particular NAND part (potentially utilising status="disabled"). Would you agree?
Cheers James [unhandled content-type:application/pgp-signature] | |