Messages in this thread Patch in this message | | | Subject | [PATCH 07/24] Documentation: DT bindings: add more chip compatible strings for Tegra124 pinmux | From | Paul Walmsley <> | Date | Wed, 28 Jan 2015 16:49:37 -0700 |
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Add a Tegra132 compatible string to the pinmux IP blocks present on chips similar to Tegra124. The primary objective here is to avoid checkpatch warnings, per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: devicetree@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- .../bindings/pinctrl/nvidia,tegra124-pinmux.txt | 1 + 1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt index 189814e7cdc7..4eb7163a2eb8 100644 --- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt +++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt @@ -7,6 +7,7 @@ a baseline, and only documents the differences between the two bindings. Required properties: - compatible: "nvidia,tegra124-pinmux" + "nvidia,tegra132-pinmux" (not yet matched in the driver) - reg: Should contain a list of base address and size pairs for: -- first entry - the drive strength and pad control registers. -- second entry - the pinmux registers
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