Messages in this thread | | | Date | Mon, 12 Jan 2015 00:57:42 +0100 | Subject | Re: [PATCHv5 2/2] gpio: sch: Add support for Intel Quark X1000 SoC | From | Linus Walleij <> |
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On Mon, Dec 8, 2014 at 10:38 AM, Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> wrote:
> Intel Quark X1000 provides a total of 16 GPIOs. The GPIOs are split between > the legacy I/O bridge and the GPIO controller. > > GPIO-SCH is the GPIO pins on legacy bridge for Intel Quark SoC. > Intel Quark X1000 has 2 GPIOs powered by the core power well and 6 from > the suspend power well. > > This piece of work is derived from Dan O'Donovan's initial work for Quark > X1000 enabling. > > Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> > Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> > Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Patch applied.
Yours, Linus Walleij
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