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    SubjectRe: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support
    Date
    On Tuesday, September 30, 2014 at 04:47:39 AM, Bean Huo 霍斌斌 (beanhuo) wrote:
    > For Micron spi norflash,enables or disables quad I/O
    > protocol ,which controled by EVCR(Enhanced
    > Volatile Configuration Register) Quad I/O
    > protocol bit 7.When EVCR bit 7 is reset to 0,
    > the spi norflash will operate in quad I/O following
    > the next WRITE ENHANCED VOLATILE CONFIGURATION
    > command.

    You only do one WRITE ENHANCED VOLATILE CONFIGURATION command in the patch, so
    this text doesn't add up.

    Try something like this:
    -->8--
    This patch adds code which enables Quad I/O mode on Micron SPI NOR
    flashes.

    For Micron SPI NOR flash, enabling or disabling quad I/O protocol
    is controled by EVCR (Enhanced Volatile Configuration Register),
    Quad I/O protocol bit 7. When EVCR bit 7 is reset to 0, the SPI
    NOR flash will operate in quad I/O mode.
    --8<--

    What do you think ?

    Brian, am I bitching too much about pointless things ? Please stop me if you
    think I do.

    [...]

    Best regards,
    Marek Vasut
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