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    Subject[PATCH v3 07/17] ia64: io: implement dummy relaxed accessor macros for writes
    Date
    write{b,w,l,q}_relaxed are implemented by some architectures in order to
    permit memory-mapped I/O accesses with weaker barrier semantics than the
    non-relaxed variants.

    This patch adds dummy macros for the write accessors to ia64, which may
    be able to be optimised in a similar manner to the relaxed read
    accessors at a later date.

    Cc: Tony Luck <tony.luck@intel.com>
    Signed-off-by: Will Deacon <will.deacon@arm.com>
    ---
    arch/ia64/include/asm/io.h | 4 ++++
    1 file changed, 4 insertions(+)

    diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h
    index bee0acd52f7e..80a7e34be009 100644
    --- a/arch/ia64/include/asm/io.h
    +++ b/arch/ia64/include/asm/io.h
    @@ -393,6 +393,10 @@ __writeq (unsigned long val, volatile void __iomem *addr)
    #define writew(v,a) __writew((v), (a))
    #define writel(v,a) __writel((v), (a))
    #define writeq(v,a) __writeq((v), (a))
    +#define writeb_relaxed(v,a) __writeb((v), (a))
    +#define writew_relaxed(v,a) __writew((v), (a))
    +#define writel_relaxed(v,a) __writel((v), (a))
    +#define writeq_relaxed(v,a) __writeq((v), (a))
    #define __raw_writeb writeb
    #define __raw_writew writew
    #define __raw_writel writel
    --
    2.1.0


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