Messages in this thread | | | Date | Sat, 13 Sep 2014 10:38:41 -0700 | From | Brian Norris <> | Subject | Re: [PATCH] mtd: nand: gpmi: add proper raw access support |
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On Sat, Sep 13, 2014 at 11:36:24PM +0800, Huang Shijie wrote: > On Fri, Sep 12, 2014 at 02:30:50PM +0200, Boris BREZILLON wrote: > > This test validates what's returned by ecc_strength file in sysfs > > (which in turn is specified by the NAND controller when initializing > > the NAND chip). > > > > Doing this should not imply knowing the ECC algorithm in use in the > > NAND controller or the layout used to store data on NAND. > the difficulty is that the ECC parity area can be not byte aligned.
Is there a problem with just rounding up to the nearest byte alignment and ignoring the few bits that are wasted?
> As I ever said, it is hard to implement the two hooks.
"Hard" doesn't mean we shouldn't. I really would like to encourage more NAND drivers to be programmed against the expected MTD behavior -- that (if possible with the given hardware) they can pass the MTD tests (drivers/mtd/tests/*).
Brian
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