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SubjectRe: [PATCH v2 3/6] x86, mm, asm-gen: Add ioremap_wt() for WT
On Wed, Sep 10, 2014 at 12:40 PM, Toshi Kani <toshi.kani@hp.com> wrote:
> On Wed, 2014-09-10 at 11:29 -0700, Andy Lutomirski wrote:
>> On Wed, Sep 10, 2014 at 9:51 AM, Toshi Kani <toshi.kani@hp.com> wrote:
> :
>> > +#ifndef ARCH_HAS_IOREMAP_WT
>> > +#define ioremap_wt ioremap_nocache
>> > +#endif
>> > +
>>
>> This is a little bit sad. I wouldn't be too surprised if there are
>> eventually users who prefer WC or WB over UC if WT isn't available
>> (and they'll want a corresponding way to figure out what kind of fence
>> to use).
>
> Right, this redirection is not ideal for the performance, but it is done
> this way for the correctness. WT & UC have strongly ordered writes, but
> WB & WC do not.

Fair enough. I think that this is unlikely to ever matter on x86, but
it might if NV-DIMMs end up used on another architecture w/o WT (or on
Xen, perhaps). Your code is certainly fine from a correctness POV.

Aside: WB writes are IIRC even more strongly ordered than WC.

>
> Thanks,
> -Toshi
>



--
Andy Lutomirski
AMA Capital Management, LLC


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