lkml.org 
[lkml]   [2014]   [Aug]   [7]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
SubjectRe: PCIe bus enumeration
Date
On Tuesday 08 July 2014 14:27:00 Bjorn Helgaas wrote:
> On Tue, Jul 8, 2014 at 1:20 PM, Federico Vaga
<federico.vaga@cern.ch> wrote:
> > On Tuesday 08 July 2014 12:23:39 Bjorn Helgaas wrote:
> >> On Tue, Jul 8, 2014 at 1:15 AM, Federico Vaga
> >
> > <federico.vaga@cern.ch> wrote:
> >> >> > So, It looks like that some BIOS disable the bridge when
> >> >> > there
> >> >> > is
> >> >> > nothing behind it. Why? Power save? :/
> >> >>
> >> >> Could be power savings, or possibly to conserve bus numbers,
> >> >> which
> >> >> are a limited resource.
> >> >
> >> > what is the maximum number of buses?
> >>
> >> 256.
> >
> > Well, it is not a small number. I will ask directly to the company
> > who sell this crate and ask them what is going on in the BIOS
>
> Yeah, it's not usually a problem until you get to the really big
> machines. The BIOS vendor could give you a much better reason; I'm
> only speculating.

Just to complete the discussion (I forgot to do it). The vendor point
me to the correct BIOS configuration to keep all the PCIe port enable
even if there is nothing in the slot. Now the bus number enumeration
seems "constant"

Thank you

--
Federico Vaga


\
 
 \ /
  Last update: 2014-08-07 17:21    [W:0.044 / U:1.056 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site