Messages in this thread Patch in this message | | | From | Kever Yang <> | Subject | [REPOST PATCH v3 3/5] ARM: dts: add rk3288 dwc2 controller support | Date | Thu, 31 Jul 2014 14:26:23 -0700 |
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rk3288 has two kind of usb controller, this add the dwc2 controller for otg and host1.
Controller can works with usb PHY default setting and Vbus on.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> ---
Changes in v3: - Moved out of pin control and sort by base address
Changes in v2: - change the node name from 'dwc2' to 'usb'
arch/arm/boot/dts/rk3288.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index ab8a611..a5607a1 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -205,6 +205,26 @@ status = "disabled"; }; + usb_host1: usb@ff540000 { + compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", + "snps,dwc2"; + reg = <0xff540000 0x40000>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_USBHOST1>; + clock-names = "otg"; + status = "disabled"; + }; + + usb_otg: usb@ff580000 { + compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", + "snps,dwc2"; + reg = <0xff580000 0x40000>; + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_OTG0>; + clock-names = "otg"; + status = "disabled"; + }; + uart2: serial@ff690000 { compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart"; reg = <0xff690000 0x100>; -- 1.7.9.5
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